Documentation
Open, shared docs. Tooling notes, design flows, and guides any member club can use and contribute to.
University ASIC & VLSI clubs
A network of university clubs teaching students to design real computer chips, together. Open documentation, shared progress, and a growing list of clubs across the world.
01What it is
Chip design is hard to break into and easy to do alone. We make it a team sport.
Open, shared docs. Tooling notes, design flows, and guides any member club can use and contribute to.
Every two weeks clubs share progress and blockers. A simple rhythm to keep things moving and learn from each other.
Everything lives in the open. Fork the repos, file issues, send pull requests.
A shared Discord where clubs talk day to day. Register your club to get an invite.
Independent student groups, working in the open and sharing what we learn. No gatekeeping, no silos. Just one signal across clubs building together.
Founded by Avyukt Raghuvanshi at the University of Minnesota, where Stone Arch Silicon is the founding chapter.
02Topology
Every university is pinned to its real location. Filled nodes have joined; hollow ones are in progress. Drag to pan, scroll or pinch to zoom, and click a node for details. Universities too close to tell apart group into one numbered marker.
03Learn
Both written by the network. Start at the first page and work forward: no prior tool experience assumed. Everything lives on GitHub with the rest of our docs, so if something is wrong or missing, open an issue or send a pull request.
Schematic capture, device sizing, simulation, and layout. The path from a single transistor to a working analog block.
Open the analog tutorials Track 02RTL, synthesis, place and route, and signoff. The path from Verilog you have written to a layout you can hand off.
Open the digital tutorials04Sponsors
The ASIC Network connects active student hardware clubs across North America, Europe, and Asia. Every new chapter we onboard naturally extends the reach of our existing partners. We keep the partner list small and deliberate: the trust of our member clubs is our most important asset, so we are highly selective about who we work with.
Students in the ASIC Network do real chip design, not coursework. When you post roles through the network, chapter leads surface candidates they know personally and would vouch for. You get a curated shortlist instead of a resume drop. Students get interviews with companies that actually understand hardware hiring.
The biggest gap between school and industry is professional tool fluency. Tooling partners support workshops and standardized flows so students train on real EDA environments. They graduate ready to contribute in your stack from day one.
Most student designs never leave a simulator. Silicon partners make the best projects real by funding tape-outs. Every chip is openly documented: PDK used, what worked, what did not. Transparent, student-generated evidence of your platform's real-world performance.
We are actively expanding with some of the strongest student hardware communities globally. Partnering early means your reach grows into every new chapter we onboard, automatically and with no contracts to revisit. If your company is serious about working with the next generation of hardware talent, we would like to talk.